The key characteristics of RapidIO such as system architecture, system topology, protocol hierarchy and flow-control are explicated. A framework of the integrated navigation system, which uses the RapidIO interconnect technology, is finally proposed. The RapidIO architecture is used to ease the interconnect bottleneck that current bus technology has encountered by defining a high-performance, packet-switched, interconnect technology designed for transferring data and control information among microprocessors, DSPs, FPGAs, communication and network processors, and peripheral devices of a system. The overall performance for integrated navigation systems can be improved greatly.