The flaw and circuit fault are most difficult situation in implementation of ASIC. In this paper, the design for testability of satellite navigation anti-jamming A/D chip based on 130nm process is introduced in detail, and the optimization and improvement scheme from the coverage and cost of the test are put forward. The coverage of the scheme can reach 99.93%, and this design can reduce the test time and cost. This chip successfully through the mass production, proved the effectiveness of testability design.