A reliable multi-rate frame synchronization algorithm is designed and the specific design scheme and implementation method on Field Programmable Gate Array (FPGA) are given. In the design, the centralized insertion method is used to realize the frame synchronization scheme, which can process 8 different rates in parallel for frame synchronization, and carry out full simulation test verification. The receiving sensitivity test is carried out on the hardware platform, and the test results show that the frame synchronization function can realize the reliable transmission of data under the condition of low noise ratio.